diff -r 04419dff594c -r 70a1d102660d test/Tools/isac/MathEngBasic/rewrite.sml --- a/test/Tools/isac/MathEngBasic/rewrite.sml Mon Jun 21 14:39:52 2021 +0200 +++ b/test/Tools/isac/MathEngBasic/rewrite.sml Mon Jun 21 15:36:09 2021 +0200 @@ -231,7 +231,7 @@ val p' = map HOLogic.dest_Trueprop ((fst o Logic.strip_prems) (Logic.count_prems r', [], r')); case p' of - [Const ("HOL.Not", _) $ (Const ("HOL.eq", _) + [Const (\<^const_name>\Not\, _) $ (Const (\<^const_name>\HOL.eq\, _) $ Free ("x", _) $ Const ("Groups.zero_class.zero", _))] => () | _ => error "rewrite.sml assumption changed"; "===== \ make asms without Trueprop --- \ "; @@ -374,10 +374,10 @@ eval_is_multUnordered "testid" "" tm thy; case eval_is_multUnordered "testid" "" tm thy of - SOME (_, Const ("HOL.Trueprop", _) $ - (Const ("HOL.eq", _) $ + SOME (_, Const (\<^const_name>\Trueprop\, _) $ + (Const (\<^const_name>\HOL.eq\, _) $ (Const ("Poly.is_multUnordered", _) $ _) $ - Const ("HOL.True", _))) => () + Const (\<^const_name>\True\, _))) => () | _ => error "rewrite.sml diff. eval_is_multUnordered 2b"; tracing "----- begin rewrite x \ 2 * x ---"; Rewrite.trace_on := false; @@ -599,14 +599,14 @@ (*+*)val Rule_Set.Repeat {id = "rateq_erls", rules, ...} = rls; (*+*)(*val rules = -(*+*) [Eval ("Rings.divide_class.divide", fn), +(*+*) [Eval (\<^const_name>\divide\, fn), (*+*) Thm ("minus_divide_left", "- ?a1 / ?b1 = - (?a1 / ?b1)"), (*+*) : -(*+*) Eval ("HOL.eq", fn), +(*+*) Eval (\<^const_name>\HOL.eq\, fn), (*+*) Thm ("not_true", "(\ True) = False"), (*+*) Thm ("not_false", "(\ False) = True"), (*+*) : -(*+*) Eval ("Transcendental.powr", fn), +(*+*) Eval (\<^const_name>\powr\, fn), (*+*) Eval ("RatEq.is_ratequation_in", fn)]: (*+*) rule list*) (*+*)chk: term list -> term list -> term list * bool